To all those folks interested in knowing my background, here is my current resume
Suresh K Devalapalli
15569 Bristol Ridge Terrace
San Diego, CA-92127
Phone: +1 858 651 8106
E-mail: mrdsureshkumar@gmail.com
Keywords
Multimedia, System Architecture, Audio Processing, DSP, MIDI, fixed-point C, embeddedC, firmware, systemC/TLM, high-level synthesis, catapultC, Virtio, hardware modeling
Highlights:
-Receipient of 9 patents in the field of HW for music synthesis and 5 pending in audio processing
-11 Qualstar Awards for being a key contributor on various projects in Qualcomm
-Five years experience in writing firmware and software
-Four years experience in multimedia system design and architecture
-Three years experience in writing systemC/TLM models
-Experience with high-level synthesis (CatapultC)
-Strong DSP fundamentals and C coding skills
-Excellent communication and interpersonal skills
Professional Experience
Staff Engineer, Graphics Systems Team, Aug 2010 – present
Qualcomm Inc, San Diego, California
Working with the Graphics Systems Team in evaluating the performance of graphics hardware core. Responsibilities include writing systemC/TLM cycle-approximate models, running various benchmarks through them, projecting the performance of the core under various system load. Help designers improve the performance and make the core tolerant to the latency by first showing the improvement using these models.
Staff Engineer, Audio Systems Team, April 2010 – Aug 2010
Qualcomm Inc, San Diego, California
Worked with the audio systems team on various projects. Work included developing, implementing and evaluating new algorithms, designing hardware for higher-performance and low-power, HW modeling using C/C++, perfomance and power analysis. Projects that I worked include:
- Multi-stream Hardware Sample Rate Converter
Designed a hardware accelerator for sample rate conversion that simultaneously can support resampling of multiple audio streams that can have different channel, input and output frequency requirements. Defined the architecture, the register specification, SW/HW interface and the usage model in the audio system. TLM model was developed to be used in Virtio Platform for early SW driver development. Various novel techniques were implemented to make sure that any CPU in the system can make use of it.
- TLM and Cosimulation models for Audio System
I was the lead for the HW models development for the HW blocks in the audio system, which include audio interface, low power RAM, AVTimer, MIDI HW, Data Mover, AVSync block etc. Both systemC/TLM models and cosimulation models (Qualcomm’s own APIs) were developed to help SW development and automation of tests.
Mentored two full-time engineers and an intern, helped them learn the HW modeling techniques,systemC/TLM and cosimulation fundamentals.
Senior Engineer, Audio Systems Team, Oct 2007 – April 2010
Qualcomm Inc, San Diego, California
In my role as Senior Engineer, I significantly contributed and lead some of the following projects:
- Design of Low-Power Audio Sub-System
Designed a low-power audio sub-system with a proprietary DSP, low power RAM, integrated audio interface,hardware accelerators and the bus architecture around them so that we could achieve sub 10mA MP3/AAC+ standalone playback power and yet support multiple audio concurrency. Performance analysis of the system under various concurrencies was carried out to prove the design. Lead the HW modeling of Audio sub-system using TLM models to create a virtual platform using Virtio from Synopsys. Virtio platform was critical early SW development.
- Unified Filter Bank Accelerator
MP3, AAC/AAC+, WMA use a similar but different filter banks in their decoding implementation. Unified Filter Bank was created as a single filter bank solution to support all the decoders. Lead the algorithm design, implementation and testing. Used CatapultC to generate the RTL from C-code. This is the first time audio team used high-level synthesis tools and I helped evaluate it.
- MIDI Hardware Accelerator Design
Qualcomm DSP wasn’t powerful enough to handle 128 DLS2.1 compliant MIDI polyphony. To support 128 polyphony, we designed a hardware accelerator. It’s a mini DSP in itself with its microcode running and multiple instances of processing elements (ALUs). Designed the instruction set, defined the register interfaces, wrote the complete C-model of hardware for assisting HW verification, did the performance analysis to make sure we can achieve the intended 128 polyphony. This project lead to 10 patents filings, out of which 9 are accepted.
Engineer, Audio Systems Team, Jan 2005 – Oct 2007
Qualcomm Inc, San Diego, California
As an engineer I focussed on contributions to the team and being a good team player. The projects
I worked on include:
- DLS2.1 and Mobile DLS compliant MIDI Synthesizer
Developed software based MIDI synthesizer in compliance with DLS2.1 and Mobile DLS Standard. MATLAB was used to develop the initial algorithm and was later ported over to fixed-point C code. Helped the firmware and the software teams to implement it on Qualcomm chipset and commercialize the product.
- Audio Playback framework on QDSP5
Designed and implemented a decoder task framework with which we could support any audio decoder on Qualcomm’s QDSP5. Demostrated the functionality on MSM7500 with a wav decoder. ADPCM decoder that followed next was done within a week, all due to the availability of framework.
Interim Engineering Intern, Audio Firmware Team, Jan 2004 – Aug 2004
Qualcomm Inc, San Diego, CA - 92121
- Reverse engineered Yamaha’s SMAF file format and music synthesis algorithm and invented al-
gorithm to produce indistinguishable sounds from Qualcomm’s music synthesis (CMX). These algo-
rithms are filed for patents and are pending.
- Designed and implemented Parametric Audio Equalizer in fixed-point C, ported it to Qualcomm
DSP’s assembly language.
Graduate Student Instructor, EECS Dept, Aug 2002 – Dec 2003
University of Michigan, Ann Arbor, MI - 48105
Teaching assistant for EECS-452 DSP Design Lab course. Responsibilities included teaching how to
do the lab work, helping with the homeworks, and grading the submitted homeworks. Also had to
help with students’ design projects that constitute 50% of their grade.
Software Design Engineer, VoIP Group, July 2001 – July 2002
Texas Instruments Pvt Ltd, Bangalore, India
Responsible for developing the optimized vocoders on the TI DSPs. My projects include:
-G.728 LDCELP on TMS320C55x processor Implemented ITU G.728 speech coding standard on TI’s TMS320C55x processor. Tested for bit-exactness with the reference test vectors, tested for interruptibility, small and large memory models and helped integrate the codec into Telogy Networks Golden Gate software system.
-GSM-FR on TMS320C64x processor Implemented GSM-FR speech coding standard on TI’s TMS320C64x processor. Tested for bit-exactness with the reference test vectors, tested for interruptibility.
-GSM-AMR on TMS320C64x processor Implemented GSM-AMR speech coding standard on TI’s TMS320C64x processor. Tested for bit-exactness with the reference test vectors, tested for interruptibility.
Patents
Kulkarni; Prajakt, Devalapalli; Suresh - “Bandwidth control for retrieval of reference waveforms in an audio device”, October 5, 2010 , U.S. Patent No.7,807,915
Kamath; Nidish Ramachandra, Kulkarni; Prajakt V, Gupta; Samir Kumar, Molloy; Stephen, Devalapalli; Suresh, Alemania; Allister - “Waveform fetch unit for processing audio files”, October 5,
2010 , U.S. U.S. Patent No.7,807,914
Kamath; Nidish Ramachandra, Kulkarni; Prajakt V, Devalapalli; Suresh, Alemania; Allister - “Shared buffer management for processing audio files”, May 25, 2010, U.S Patent No.7,723,601
Devalapalli; Suresh, Kulkarni; Prajakt, Kamath; Nidish Ramachandra - “Efficient identification of sets of audio parameters”, May 18, 2010, U.S. Patent No.7,718,882
Molloy; Stephen, Devalapalli; Suresh, Kamath; Nidish Ramachandra - “Method and device for generating triangular waves ”, March 30, 2010, U.S. Patent No.7,687,703
Devalapalli; Suresh, Kulkarni; Prajakt, Kamath; Nidish Ramachandra - “Musical instrument digital interface hardware instructions ”, March 16, 2010, U.S Patent No.7,678,986
Kamath; Nidish Ramachandra, Kulkarni; Prajakt, Devalapalli; Suresh - “Musical instrument digital interface hardware instruction set ”, February 16, 2010, U.S Patent No.7,663,052
Kamath; Nidish, Choy; Eddie L. T., Kulkarni; Prajakt, Gupta; Samir K, Molloy; Stephen, Devalapalli; Suresh - “Audio processing hardware elements ”, February 16, 2010, U.S Patent No.7,663,051
Kulkarni; Prajakt, Choy; Eddie L. T., Kamath; Nidish Ramachandra, Gupta; Samir K, Molloy; Stephen, Devalapalli; Suresh - “Pipeline techniques for processing musical instrument digital interface (MIDI) files", February 16, 2010, U.S Patent No.7,663,046
Education
Master of Science and Engineering in Electrical Engineering - Systems Sept 2002 – Dec 2004
University of Michigan, Ann Arbor, Michigan
GPA: 8.12/9
Bachelor of Engineering in Electronics and Communications Engineering Sept 1997 – May 2001
Regional Engineering College, Trichy, India
Percentage: 80.5%
Computer Skills
C, C++
Matlab, SytemC/TLM
Perl, Ruby
Windows, Linux